The power AVR uses a finite state machine to decide when to charge and when the system is in a bad state.
In standard operating mode, the system_state is given by three bits (eight states)
Bit 2: BAT_OK
Bit 1:Charge_OK
Bit 0: Voltage_OK

States 2, 6, or random bits in system state were used to indicate a logical error.  When observed, another bit is set (FATAL_ERROR = Bit 3) and saved to non-volatile memory.  The system will not operate normally until the AVR is reflashed. 

This condition was observed, possibly due to timing issues.  States 2 & 6 now follow the semantics of states 3 & 7, which are non-fatal states.